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1/17 TDA7562 may 2003 n dmos power output n high output power capability 4x25w/ 4 w @ 14.4v, 1khz, 10% thd, 4x35w eiaj n max. output power 4x60w/2 w n full i 2 c bus driving: Cst-by C independent front/rear soft play/ mute C selectable gain 30db - 16db (for low noise line output function) Ci 2 c bus digital diagnostics n full fault protection n dc offset detection n four independent short circuit protection n clipping detector pin with selectable threshold (2%/10%) n st-by/mute pin n esd protection description the TDA7562 is a new bcd technology quad bridge type of car radio amplifier in flexiwatt27v package specially intended for car radio applica- tions. thanks to the dmos output stage the TDA7562 has a very low distortion allowing a clear powerful sound. this device is equipped with a full diagnostics array that communicates the status of each speaker through the i 2 c bus.the possibility to control the configuration and the behaviour of the device by means of the i 2 c bus makes TDA7562 a very flexible machine. flexiwatt27 (vertical) multifunction quad power amplifier with built-in diagnostics features block diagram short circuit protection & diagnostic i2cbus mute1 mute2 thermal protection & dump clip detector in lf in rr in rf in lr vcc1 vcc2 cd_out out rf+ out rf- out rr+ out rr- out lf+ out lf- out lr+ out lr- short circuit protection & diagnostic short circuit protection & diagnostic short circuit protection & diagnostic 16/30db reference clk data svr ac_gnd tab s_gnd pw_gnd f f r r rf rr lf lr st-by/mute 16/30db 16/30db 16/30db multipower bcd technology mosfet output power stage
TDA7562 2/17 absolute maximum ratings thermal data pin connection (top view) symbol parameter value unit v op operating supply voltage 18 v v s dc supply voltage 28 v v peak peak supply voltage (for t = 50ms) 50 v v ck ck pin voltage 6 v v data data pin voltage 6 v i o output peak current (not repetitive t = 100 m s) 8 a i o output peak current (repetitive f > 10hz) 6 a p tot power dissipation t case = 70c 85 w t stg , t j storage and junction temperature -55 to 150 c symbol parameter value unit r th j-case thermal resistance junction to case max. 1 c/w d00au123 0 tab stby pw_gnd lr out lr- cd-out out lr+ v cc1 out lf- pw_gnd lf out lf+ svr in lf in lr s_gnd in rr in rf ac gnd out rf+ pw_gnd rf out rf- v cc2 ck out rr- out rr+ pw_gnd rr data tab 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 25 26 22 21 23 24 27
3/17 TDA7562 figure 1. application circuit in rf c1 0.22 m f in rr c2 0.22 m f out rf out rr in lf c3 0.22 m f in lr c4 0.22 m f out lf out lr d00au1231a c5 1 m f c6 10 m f tab 47k - + - + - + - + vcc1 vcc2 c8 0.1 m f v(4v .. v cc ) c7 3300 m f data i 2 c bus clk 13 12 15 16 23 26 2 14 s-gnd 17 11 5 cd out v 721 18 19 20 22 25 24 10 9 8 6 3 4 1, 27
TDA7562 4/17 electrical characteristics (refer to the test circuit, v s = 14.4v; r l = 4 w ; f = 1khz; t amb = 25c; unless otherwise specified.) symbol parameter test condition min. typ. max. unit power amplifier v s supply voltage range 8 18 v i d total quiescent drain current 150 300 ma p o output power eiaj (v s = 13.7v) 32 35 w thd = 10% thd = 1% 22 25 20 w w r l = 2 w ; eiaj (v s = 13.7v) r l = 2 w ; thd 10% r l = 2 w ; thd 1% r l = 2 w ; max power 50 32 55 38 30 60 w w w w thd total harmonic distortion p o = 1w to 10w; f = 1khz 0.04 0.1 % p o = 1-10w, f = 10khz 0.02 0.5 % g v = 16db; v o = 0.1 to 5vrms 0.02 0.05 % c t cross talk f = 1khz to 10khz, r g = 600 w 50 60 db r in input impedance 60 100 130 k w g v1 voltage gain 1 29.5 30 30.5 db d g v1 voltage gain match 1 -1 1 db g v2 voltage gain 2 15.5 16 16.5 db d g v2 voltage gain match 2 -1 1 db e in1 output noise voltage 1 r g = 600 w 20hz to 22khz 50 100 m v e in2 output noise voltage 2 r g = 600 w ; gv = 16db 20hz to 22khz 15 30 m v svr supply voltage rejection f = 100hz to 10khz; v r = 1vpk; r g = 600 w 50 60 db bw power bandwidth 100 khz a sb stand-by attenuation 90 110 db i sb stand-by current 2 100 m a a m mute attenuation 80 100 db v os offset voltage mute & play -100 0 100 mv v am min. supply mute threshold 7 7.5 8 v t on turn on delay d2/d1 (ib1) 0 to 1 5 20 ms t off turn off delay d2/d1 (ib1) 1 to 0 5 20 ms v sby st-by/mute pin for st-by 0 1.5 v v mu st-by/mute pin for mute 3.5 5 v v op st-by/mute pin for operating 7 v s v i mu st-by/mute pin current v stby/mute = 8.5v 20 40 m a v stby/mute < 1.5v 0 10 m a cd lk clip det high leakage current cd off 0 15 m a cd sat clip det sat. voltage cd on; i cd = 1ma 300 mv cd thd clip det thd level d0 (ib1) = 1 5 10 15 % d0 (ib1) = 0 1 2 3 %
5/17 TDA7562 diagnostics (power amplifier mode or line driver mode) pgnd short to gnd det. (below this limit, the output is considered in short circuit to gnd) power amplifier in mute or play, one or more short circuits protection activated 1.2 v pvs short to v s det. (above this limit, the output is considered in short circuit to v s ) vs -1.2 v pnop normal operation thresholds. (within these limits, the output is considered without faults). 1.8 vs -1.8 v lsc shorted load det. power amplifier mode 0.5 w line driver mode 1.5 w v o offset detection 1.5 2 2.5 v i 2 c bus interface f scl clock frequency 400 khz v il input low voltage 1.5 v v ih input high voltage 2.3 v electrical characteristics (continued) (refer to the test circuit, v s = 14.4v; r l = 4 w ; f = 1khz; t amb = 25c; unless otherwise specified.) symbol parameter test condition min. typ. max. unit
TDA7562 6/17 figure 2. quiescent current vs. supply voltage figure 3. output power vs. supply voltage (4 w ) figure 4. output power vs. supply voltage (2 w ) figure 5. distortion vs. output power (4 w ) figure 6. distortion vs. output power (2 w ) figure 7. distortion vs. output power (4 w ) 8 10 121 41 6 18 vs (v) 50 70 90 110 130 150 170 190 210 230 250 id (ma) vin = 0 no loads 8 9 10 11 12 13 14 15 16 17 18 vs (v) 5 10 15 20 25 30 35 40 45 50 55 60 65 70 po (w) rl = 4 ohm f = 1 khz thd = 10 % thd = 1 % po-max 8 9 10 11 12 13 14 15 16 vs (v) 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 po (w) rl = 2 ohm f = 1 khz thd = 10 % thd = 1 % po-max 0.1 1 10 po (w) 0.01 0.1 1 10 thd (%) f = 10 khz vs = 14.4 v rl = 4 ohm f = 1 khz 0.1 1 10 po (w) 0.01 0.1 1 10 thd (%) f = 10 khz vs = 14.4 v rl = 2 ohm f = 1 khz 10 100 1000 10000 f (hz) 0.01 0.1 1 10 thd (%) vs = 14.4 v rl = 4 ohm po = 4 w
7/17 TDA7562 figure 8. distortion vs. frequency (2 w ) figure 9. crosstalk vs. frequency figure 10. supply voltage rejection vs. freq. figure 11. power dissipation & efficiency vs. output power (4 w , std, sine) figure 12. power dissipation vs. average ouput power (audio program simulation, 4 w ) figure 13. power dissipation vs. average ouput power (audio program simulation, 2 w ) 10 100 1000 10000 f (hz) 0.01 0.1 1 10 thd (%) vs = 14.4 v rl = 2 ohm po = 8 w 10 100 1000 10000 f (hz) 20 30 40 50 60 70 80 90 crosstalk (db) rl = 4 ohm po = 4 w rg = 600 ohm 10 100 1000 10000 f (hz) 20 30 40 50 60 70 80 90 svr (db) rg = 600 ohm vripple= 1 vpk 0 2 4 6 8 10 12 14 16 18 20 22 24 26 po (w) 0 10 20 30 40 50 60 70 80 90 ptot (w) 0 10 20 30 40 50 60 70 80 90 n (%) vs = 14.4 v rl = 4 x 4 ohm f = 1 khz sine n ptot 01 2 345 po (w) 5 10 15 20 25 30 35 40 45 ptot (w) vs = 14 v rl = 4 x 4 ohm gaussian noise clip start 012345678 po (w) 0 10 20 30 40 50 60 70 80 90 ptot (w) vs = 14 v rl = 4 x 2 ohm gaussian noise clip start
TDA7562 8/17 diagnostics functional description: detectable conventional faults are: C short to gnd C short to vs C short across the speaker the following additional features are provided: C output offset detection the TDA7562 has 2 operating statuses: 1)) restart mode. the diagnostic is not enabled. each audio channel operates independently from each oth- er. if any of the a.m. faults occurs, only the channel(s) interested is shut down. a check of the output status is made every 1 ms (fig. 14). restart takes place when the overload is removed. 2)) diagnostic mode. it is enabled via i2c bus and self activates if an output overload (such to cause the intervention of the short-circuit protection) occurs to the speakers outputs . once activated, the diagnostics procedure develops as follows (fig. 15): C to avoid momentary re-circulation spikes from giving erroneous diagnostics, a check of the output status is made after 1ms: if normal situation (no overloads) is detected, the diagnostic is not per- formed and the channel returns back active. C instead, if an overload is detected during the check after 1 ms, then a diagnostic cycle having a du- ration of about 100 ms is started. C after a diagnostic cycle, the audio channel interested by the fault is switched to restart mode. the relevant data are stored inside the device and can be read by the microprocessor. when one cycle has terminated, the next one is activated by an i2c reading. this is to ensure continuous diagnostics throughout the car-radio operating time. C to check the status of the device a sampling system is needed. the timing is chosen at microproces- sor level (over half a second is recommended). figure 14. restart timing without diagnostic enable (each 1ms time, a sampling of the fault is done) figure 15. restart timing with diagnostic enable t 1-2ms 1ms 1ms 1ms 1ms overcurrent and short circuit protection intervention (i.e. short circuit to gnd) short circuit removed out t overcurrent and short (i.e. short circuit to gnd) short circuit removed 1ms 100ms 1ms 1ms
9/17 TDA7562 as for short to gnd / vs the fault-detection thresholds remain unchanged from 30 db to 16 db gain setting. they are as follows: concerning short across the speaker , the threshold varies from 30 db to 16 db gain setting, since different loads are expected (either normal speaker's impedance or high impedance). the values in case of 30 db gain are as follows: if the line-driver mode (gv= 16 db and line driver mode diagnostic = 1) is selected, the same thresholds will change as follows: output dc offset detection any dc output offset exceeding 2v are signalled out. this inconvenient might occur as a consequence of ini- tially defective or aged and worn-out input capacitors feeding a dc component to the inputs, so putting the speakers at risk of overheating. this diagnostic has to be performed with low-level output ac signal (or vin = 0). the test is run with selectable time duration by microprocessor (from a "start" to a "stop" command): C start = last reading operation or setting ib1 - d5 - (offset enable) to 1 C stop = actual reading operation excess offset is signalled out if persistent throughout the assigned testing time. this feature is disabled if any overloads leading to activation of the short-circuit protection occurs in the process. multiple faults when more misconnections are simultaneously in place at the audio outputs, it is guaranteed that at least one of them is initially read out. the others are notified after successive cycles of i 2 c reading and faults removal, provided that the diagnostic is enabled. the table below shows all the couples of double-fault possible. it should be taken into account that a short circuit d01au1253 s.c. to gnd x s.c. to vs 0v 1.8v v s -1.8v v s x normal operation 1.2v v s -1.2v s.c. across load x 0v 1.5 w infinite normal operation 0.5 w d01au1254mod d01au1252mod s.c. across load x 0 w 4.5 w infinite normal operation 1.5 w
TDA7562 10/17 with the 4 ohm speaker unconnected is considered as double fault. s. gnd (so) / s. gnd (sk) in the above table make a distinction according to which of the 2 outputs is shorted to ground (test-current source side= so, test-current sink side = sk). more precisely, so = ch+, sk = ch-. faults availability all the results coming from i2cbus, by read operations, are the consequence of measurements inside a defined period of time. if the fault is stable throughout the whole period, it will be sent out. to guarantee always resident functions, every kind of diagnostic cycles will be reactivate after any i 2 c reading operation. so, when the micro reads the i 2 c, a new cycle will be able to start, but the read data will come from the previous diag. cycle (i.e. the device is in turned on, with a short to gnd, then the short is removed and micro reads i 2 c. the short to gnd is still present in bytes, because it is the result of the previous cycle. if another i 2 c reading operation occurs, the bytes do not show the short). in general to observe a change in diagnostic bytes, two i 2 c reading operations are necessary. i 2 c programming/reading sequences a correct turn on/off sequence respectful of the diagnostic timings and producing no audible noises could be as follows (after battery connection): turn-on: pin2 > 7v --- 10ms --- (stand-by out + diag enable) --- 500 ms (min) --- muting out turn-off: muting in --- 20 ms --- (diag disable + stand-by in) --- 10ms --- pin2 = 0 car radio installation: pin2 > 7v --- 10ms diag enable (write) --- 200 ms --- i 2 c read (repeat until all faults disappear). offset test: device in play (no signal) -- offset enable - 30ms - i 2 c reading (repeat i 2 c reading until high-offset message disappears). fast muting the muting time can be shortened to less than 1ms by setting (ib2) d5 = 1. this option can be useful in transient battery situations (i.e. during car engine cranking) to quickly turnoff the amplifier for avoiding any audible effects caused by noise/transients being injected by preamp stages. double fault table for turn on diagnostic s. gnd (so) s. gnd (sk) s. vs s. across l. s. gnd (so) s. gnd s. gnd s. vs + s. gnd s. gnd s. gnd (sk) / s. gnd s. vs s. gnd s. vs / / s. vs s. vs s. across l. / / / s. across l.
11/17 TDA7562 i 2 c bus interface data transmission from microprocessor to the TDA7562 and viceversa takes place through the 2 wires i 2 c bus inter- face, consisting of the two lines sda and scl (pull-up resistors to positive supply voltage must be connected). data validity as shown by fig. 16, the data on the sda line must be stable during the high period of the clock. the high and low state of the data line can only change when the clock signal on the scl line is low. start and stop conditions as shown by fig. 17 a start condition is a high to low transition of the sda line while scl is high. the stop condition is a low to high transition of the sda line while scl is high. byte format every byte transferred to the sda line must contain 8 bits. each byte must be followed by an acknowledge bit. the msb is transferred first. acknowledge the transmitter* puts a resistive high level on the sda line during the acknowledge clock pulse (see fig. 18). the receiver** the acknowledges has to pull-down (low) the sda line during the acknowledge clock pulse, so that the sdaline is stable low during this clock pulse. * transmitter Cmaster ( m p) when it writes an address to the TDA7562 C slave (TDA7562) when the m p reads a data byte from TDA7562 ** receiver C slave (TDA7562) when the m p writes an address to the TDA7562 Cmaster ( m p) when it reads a data byte from TDA7562 figure 16. data validity on the i 2 cbus figure 17. timing diagram on the i 2 cbus figure 18. acknowledge on the i 2 cbus sda scl data line stable, data valid change data allowed d99au1031 scl sda start i 2 cbus stop d99au1032 scl 1 msb 23789 sda start acknowledgment from receiver d99au1033
TDA7562 12/17 software specifications all the functions of the TDA7562 are activated by i 2 c interface. the bit 0 of the "address byte" defines if the next bytes are write instruction (from m p to TDA7562) or read instruction (from TDA7562 to m p). chip address: x = 0 write to device x = 1 read from device if r/w = 0, the m p sends 2 "instruction bytes": ib1 and ib2. ib1 ib2 d7 d0 1101100xd8 hex d7 x d6 diagnostic enable (d6 = 1) diagnostic defeat (d6 = 0) d5 offset detection enable (d5 = 1) offset detection defeat (d5 = 0) d4 front channel gain = 30db (d4 = 0) gain = 16db (d4 = 1) d3 rear channel gain = 30db (d3 = 0) gain = 16db (d3 = 1) d2 mute front channels (d2 = 0) unmute front channels (d2 = 1) d1 mute rear channels (d1 = 0) unmute rear channels (d1 = 1) d0 cd 2% (d0 = 0) cd 10% (d0 = 1) d7 x d6 used for testing d5 normal muting time (d5 = 0) fast muting time (d5 = 1) d4 stand-by on - amplifier not working - (d4 = 0) stand-by off - amplifier working - (d4 = 1) d3 power amplifier mode diagnostic (d3 = 0) line driver mode diagnostic (d3 = 1) d2 x d1 x d0 x
13/17 TDA7562 if r/w = 1, the TDA7562 sends 4 "diagnostics bytes" to m p: db1, db2, db3 and db4. db1 db2 d7 thermal warning active (d7 = 1) d6 diag. cycle not activated or not terminated (d6 = 0) diag. cycle terminated (d6 = 1) d5 x d4 x d3 channel lf normal load (d3 = 0) short load (d3 = 1) d2 channel lf no output offset (d2 = 0) output offset detection (d2 = 1) d1 channel lf no short to vcc (d1 = 0) short to vcc (d1 = 1) d0 channel lf no short to gnd (d1 = 0) short to gnd (d1 = 1) d7 offset detection not activated (d7 = 0) offset detection activated (d7 = 1) d6 x d5 x d4 x d3 channel lr normal load (d3 = 0) short load (d3 = 1) d2 channel lr no output offset (d2 = 0) output offset detection (d2 = 1) d1 channel lr no short to vcc (d1 = 0) short to vcc (d1 = 1) d0 channel lr no short to gnd (d1 = 0) short to gnd (d1 = 1)
TDA7562 14/17 b3 db4 d7 stand-by status (= ib1 - d4) d6 diagnostic status (= ib1 - d6) d5 x d4 channel rf turn-on diagnostic (d4 = 0) x d3 channel rf normal load (d3 = 0) short load (d3 = 1) d2 channel rf no output offset (d2 = 0) output offset detection (d2 = 1) d1 channel rf no short to vcc (d1 = 0) short to vcc (d1 = 1) d0 channel rf no short to gnd (d1 = 0) short to gnd (d1 = 1) d7 x d6 x d5 x d4 x d3 channel rr rnormal load (d3 = 0) short load (d3 = 1) d2 channel rr no output offset (d2 = 0) output offset detection (d2 = 1) d1 channel rr no short to vcc (d1 = 0) short to vcc (d1 = 1) d0 channel rr no short to gnd (d1 = 0) short to gnd (d1 = 1)
15/17 TDA7562 examples of bytes sequence 1 - turn-on of the power amplifier with 30db gain, mute on, diagnostic defeat, cd = 2%. 2 - turn-off of the power amplifier 3 - offset detection procedure enable 4 - offset detection procedure stop and reading operation (the results are valid only for the offset detection bits (d2 of the bytes db1, db2, db3, db4). n the purpose of this test is to check if a d.c. offset (2v typ.) is present on the outputs, produced by input capacitor with anomalous leackage current or humidity between pins. n the delay from 4 to 5 can be selected by software, starting from t.b.d. ms start address byte with d0 = 0 ack ib1 ack ib2 ack stop x0000000 xxx1xx11 start address byte with d0 = 0 ack ib1 ack ib2 ack stop x0xxxxxx xxx0xxxx start address byte with d0 = 0 ack ib1 ack ib2 ack stop xx1xx11x xxx1xxxx start address byte with d0 = 1 ack db1 ack db2 ack db3 ack db4 ack stop
TDA7562 16/17 outline and mechanical data dim. mm inch min. typ. max. min. typ. max. a 4.45 4.50 4.65 0.175 0.177 0.183 b 1.80 1.90 2.00 0.070 0.074 0.079 c 1.40 0.055 d 0.75 0.90 1.05 0.029 0.035 0.041 e 0.37 0.39 0.42 0.014 0.015 0.016 f (1) 0.57 0.022 g 0.80 1.00 1.20 0.031 0.040 0.047 g1 25.75 26.00 26.25 1.014 1.023 1.033 h (2) 28.90 29.23 29.30 1.139 1.150 1.153 h1 17.00 0.669 h2 12.80 0.503 h3 0.80 0.031 l (2) 22.07 22.47 22.87 0.869 0.884 0.904 l1 18.57 18.97 19.37 0.731 0.747 0.762 l2 (2) 15.50 15.70 15.90 0.610 0.618 0.626 l3 7.70 7.85 7.95 0.303 0.309 0.313 l4 5 0.197 l5 3.5 0.138 m 3.70 4.00 4.30 0.145 0.157 0.169 m1 3.60 4.00 4.40 0.142 0.157 0.173 n 2.20 0.086 o 2 0.079 r 1.70 0.067 r1 0.5 0.02 r2 0.3 0.12 r3 1.25 0.049 r4 0.50 0.019 v 5? (typ.) v1 3? (typ.) v2 20? (typ.) v3 45? (typ.) (1): dam-bar protusion not included (2): molding protusion included flexiwatt27 (vertical) h3 r4 g v v g1 l2 h1 h f m1 l flex27me v3 o l3 l4 h2 r3 n v2 r r2 r2 c b l1 m r1 l5 r1 r1 e d a v1 v1 7139011 pin 1
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics ? 2003 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan -malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com 17/17 TDA7562

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